NNCI Etch Symposium Program

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This program is tentative and subject to change. Please check back regularly for updates.

Session Themes: 

  • Device-driven plasma etch challenges
  • Advances in atomic scale processing
  • Advances in Cryogenic Etching
  • Plasma characterization, diagnostics, and manipulation
  • Modeling, artificial intelligence, and machine learning for plasma etching
  • Sustainability in plasma etching 

Monday, June 30

Venue: MIT Media Lab, 75 Amherst Street, Building E14, 6th Floor

Time

Session

Speakers

8:00  AM

Registration Opens

 

8:00 AM

Breakfast

 

9:00 AM

Opening Remarks

Jorg Scholvin, Associate Director, Fab.nano, MIT

Ling Xie, Principal Scientist, Harvard 

9:10 AM

Keynote

Vladimir Bulović, Director, MIT.nano; Fariborz Maseeh (1990) Professor of Emerging Technology

9:40 AM

Session 1A

Moderator: Jorg Scholvin 

Self-Aligned Fabrication of Vertical Fin-Based Structures
Joshua Perozek, Research Assistant, MIT

High Aspect Ratio Plasma Etching Using Pulsed Low RF Biases
Evan Litch, Graduate Research Assistant, U. Michigan

10:20 AM

Break & Sponsor Networking

 

11:00 AM

Session 1B

Moderator: Durga Gajula

Modeling of Modern Plasma Processing Reactors: Plasma Physics and Surface Chemistry
Igor Kaganovich, Research Physicist Princeton PPPL

Atomic Layer Etching of Si in CI2, Br2, HBr-containing Plasmas
Mahmoud Elgarhy. Post Doctoral Fellow, U. Houston 

11:40 AM

Sponsor Showcase

NNCI Etch Symposium Sponsors

12:20 PM

Lunch & Sponsor Networking

 

1:40 PM

Session 2

Moderator: Ling Xie

A reduced order model of Si-Cl2-Ar atomic layer etching
David Graves, Professor of Chemical and Biological Engineering; PPPL Associated Faculty, Princeton University 

CI2-based Selective Etching of Transition Metal Dichalcogenides
Nicholas Trainor, Graduate Student, Penn State 

Thin-film Lithium Tantalate Device Fabrication and Performance
Neil Sinclair, Research Scientist, Harvard 

Atomic Layer Etching (ALE): A Pathway to Advanced Semiconductor
Paul Plate, Deputy Head of Plasma Application, SENTECH

3:00 PM

Break & Poster Session A

 

4:00 PM

Session 3

Moderator: Lavendra Mandyam

Achieving Sustainability in the Semiconductor Industry: The Impact of Simulation and AI 
Wojciech Osowiecki, Staff Product Marketing Engineer, Lam Research 

Gentle Processing of Sensitive Materials Using a Low Temperature Magnetized Plasma 
Yevgeny Raitses, Physicist, Princeton PPPL

Addressing Etch Challenges for Strongly Bonded Materials Used in Photonics and MEMS
Brian Yount, Regional Product Manager, SPTS Division, KLA

Deep Learning Outperforms RCWA for Multimodal Measurement of High-Aspect-Ratio Nanostructures
Shiva Mudide, Graduate Student, MIT 

5:20 PM

Walk over to MIT.nano

 

5:30 PM

Tours of MIT.nano

 

 

Tuesday, July 1
Venue: MIT Media Lab, 75 Amherst Street, Building E14, 6th Floor

Time

Session

Speakers

7:30 AM

(Optional) Tour of MIT.nano

 

8:00 AM

Breakfast

 

9:00 AM

Etch Keynote

50 years of Plasma Etching Innovation in the Semiconductor Industry: From RIE to ALE
Christophe Vallee, Professor, College of Nanotechnology, Science, and Engineering Department of Nanoscale Science & Engineering, University of Albany

9:40 AM

Session 4A

Moderator: Lavendra Mandyam

Experimental and Computational Investigation of Plasma-less selective etching of SiGe by F2
Zach Zajo, Process Engineer, Lam Research

Optimization of Neutral Loop Discharge (NLD) using Machine Learning
Keiichiro Asakawa-Ulvac Japan

10:20 AM

Break & Sponsor Networking

 

11:00 AM

Session 4B

Moderator: Durga Gajula

Sustainable Microelectronics in the Age of AI
Abrar Abdurrob, PhD Candidate, Stony Brook University

Strategic-tiers to Lower Direct Emissions from Plasma Dry Etch Processes with Emphasis on Replacement-tier
Gurpreet Singh Lugani, Engineer, Micron Technology

Atomic Scale Processing for Fabrication of Quantum Devices
Nicholas Chittock, Quantum Market Specialist, Oxford Instruments

ALE of Wide- and Ultrawide-Bandgap Semiconductors
Jeffrey Daulton, Associate Staff, MIT Lincoln Lab

12:20 PM

Lunch & Sponsor Networking

 

1:40 PM

Keynote

The Evolution of Nanotechnology Infrastructure Network: Past Achievements, Current Impact, and Future Directions
David Gottfried, Director, NNCI Coordinating Office

2:20 PM

Session 5

Moderator: Vince Genova

Mechanisms for Cryogenic Plasma Etching of High Aspect Ratio Features
Mark Kushner, George I. Haddad Professor of Electrical Engineering and Computer Science, U. Michigan

On Using Pulsed Plasmas for High-Aspect Ratio Silicon Etching
Xingyi Shi, Scientist, Applied Materials

3:00 PM

(Optional) Tours of MIT.nano & Harvard CNS

 

 

 

Wednesday, July 2
Venue: MIT Media Lab, 75 Amherst Street, Building E14, 6th Floor

Time

Session

Speakers

7:30 AM

(Optional) Tour of MIT.nano

 

8:00 AM

Breakfast

 

9:00 AM

Panel Discussion 1

Moderator: Vincent J. Genova

Mark Kushner, George I. Haddad Professor of Electrical Engineering and Computer Science, U. Michigan

Christophe Vallee, Professor, College of Nanotechnology, Science, and Engineering Department of Nanoscale Science & Engineering, University of Albany

 

David Coumou, Managing Director of core R&D, Applied Materials

10:15 AM

Break & Sponsor Networking

 

11:00 AM

Panel Discussion 2

Moderator: Vincent J. Genova

Mark Kushner, George I. Haddad Professor of Electrical Engineering and Computer Science, U. Michigan

Christophe Vallee, Professor, College of Nanotechnology, Science, and Engineering Department of Nanoscale Science & Engineering, University of Albany

 

David Coumou, Managing Director of core R&D, Applied Materials

12:15 PM

Closing Remarks 

Jorg Scholvin, Associate Director, Fab.nano, MIT

Ling Xie, Principal Scientist, Harvard

12:20 PM

Lunch & Sponsor Networking