Tool Talks with DISCO

A Survey of Novel Process Development and Unique Technology Adaptations in Dicing, Grinding, and Polishing Unit Operations for Advanced Packaging  

Tuesday, September 24, 2019
11:00am–1:00pm
12-0168, MIT.nano (basement level), Building 12
60 Vassar Street (rear)
Cambridge, MA
 

In recent years, the innovative advancements in various market segments of the micro-electronics and -devices industries have erupted to overtake the dominant pursuit for Moore’s law of miniaturization, which has approached the limits of net-positive economic return. Just to name a few: advancements in packaging interconnect and RDL assemblies have been enabling new logic and memory computations capabilities; novel materials adoption for power devices has been aiding development for next-generation automotives and mobile devices; and the ability to fabricate micro-LED packages has motivated the quest for the next-generation displays that can improve our quality of life. The categorization and precisions conventionally separating ‘frontend’ vs. ‘backend’ processes are gradually disappearing. In the arena of dicing, thinning, and polishing processing technologies, the industry has also made rapid progress to accommodate the wide spectra of material properties and increasingly stringent packaging requirements.

The author would like to give a snapshot review—through several empirical case studies—on the challenging process capabilities achieved in die singulation, thinning and polishing from both the substrate backside as well as on the device frontside, and the enabled resulting interconnect fabrications and/or chip-scale packaging process integrations. The ensemble of processes in the discussion includes dicing technologies by mechanical sawing, on-surface laser ablations, below-surface laser processes (stealth dicing), and plasma etching. The discussions will also include ultra-thin wafer thinning and damage minimization techniques, and surface planarization of ductile materials like polymers and metallic structures on substrates surfaces. The cases in the discussion are drawn from emerging developments in the fabrications of biomedical, power, advanced lighting, MEMS, CMOS, and RF devices, as well as wafer and package, substrates manufacturing.