ML models are growing at an unprecedented rate and traditional forms of scaling chip performance are insufficient to keep up. In this talk, Lie will examine how co-design can enable specialized ML architectures including wafer-scale chips, sparse computation, optimized memories, and interconnects. Lie will explore this rich design space using the Cerebras architecture as a case study, highlighting design principles that enable the ML models of the future.
12PM - 1PM EST
Virtual on Zoom
Part of the MTL Seminar Series